[T2k]

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Ezt írta Elric:
T2k, ismerve a jelenelgi "allapotokat" a low-k dielektrikumokkal kapcsolatban, szerintem kizart, hogy massziv gyartas legyen jovo tavasznal hamarabb es az is csak az elso fecskevel fog megtortenni.
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Kerdezek vmit: gondolod, bejelentett volna egy termeket, amire senki sem kenyszeriti (kenyelmes elonyben van a versenytarsaval szemben) az ATI, ha NEM TUDNA biztosan, hogy gyarthato?

En kizarom ezt.

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Nagyon sokan megijedtek, mert bazi sok a gaz vele. Mint azt mar irtam a gyartastechnologiat nagymertekben megbolonditja. A tapasztalat nem jon meg 3 honap alatt. Ha valaki belefut valami low-k gyartasi problemaba, akkor az 6-9 honap mire megoldjak.
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Annak mar kie kellett volna derulnie az elso szeriak soran nem? (Bejelentes elott csak nekialltak legyartani parezret...)

A tapasztalat oke, a 3 honapot ugy ertem, hogy azalatt mar millios mennyiseget legyarthatnak akar, ami pedig ARRA mindenkeppen eleg IMHO, hogy a kov. nagy chipet, az R420-ast mar hozzaigazithassak. Egy idei (evvegi) tapeout utan meg aprilis-majusra keszen allhatnak az uj chippel...

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Nem veletlen, hogy az IBM, az Infineon, a TSMC es meg sokan masok is folyamatosan hezitalnak. Az UMC is eldobta a SiLK-et, nem csak az IBM gondolkozik ezen. A masik gyakori anyag a Black Diamond, ami kicsit jobb, de nem sokkal.
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Nem tudom, de az EETimes pont azt irta nemreg, hogy a dolog mukszik, mar teszteli a Xilinx, a SiS meg vmi harmadik ceg.

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Az elso hirek egyebkent a low-k dielektrikumokrol 1999-ben jottek meg, most meg mar 2003 vege van. Ma sokan azt mondjak, hogy sub-100nm kell majd (65nm-45nm), ami meg 2-3 ev! Vannak akik meg azt mondjak, hogy a SiO2 siman szigetelhet meg akar 45nm-ig is, ha kicsit tuningolnak a gyartastechnologian.
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En nem ertek ennyire hozza, de azt tippelem, hogy egyszerubb felepitesu cuccoknal (egy VPU szerintem egyszerubb, mint egy Itanium2) kevesbe problamas a dolog, de javits ki, ha tevedek.

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Ennek ellenere, sajnos nem ertek hozza, csak azt latom ami a konferenciakon megjelenik, az meg sok esetben messze lehet a valosagtol.
Elric
Elric[/quote]

Hmm. Hat, az tuti, hogy nem aruljak el konkretan, hogy ok hol is tartanak es hogyan is oldottak meg a gondokat utkozben...

[Ytse]

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Ezt írta T2k:
En nem ertek ennyire hozza, de azt tippelem, hogy egyszerubb felepitesu cuccoknal (egy VPU szerintem egyszerubb, mint egy Itanium2) kevesbe problamas a dolog, de javits ki, ha tevedek.[/quote]

Ezzel nem feltétlen értek egyet, az Itanium csak a hatalmas cache miatt áll ilyen sok tranzisztorból, a logika* lényegesen kisebb és egyszerûbb, mint egy mai csúcs VPU -- megjegyzem, pont ez a VLIW-ek értelme, mármint adott teljesítményt kisebb bonyolultságú logikai áramkörrel lehet megvalósítani. Hatalmas cache-t, vagyis töméntelen sok SRAM-ot nem nehéz gyártani, nem véletlen, hogy az Intel is ezzel kezdte a 90 nanométeres technológia tesztelését.

(*A Merced magja mindössze 30 millió tranzisztort tartalmaz.)

[Elric]

T2k, mar lattam olyat parszor, hogy valaki bejelentett valamit, majd rajott, nem megy es elhalasztotta par honappal. Lehet, hogy tevesen latom es valoban lesz egy-ket termekben sorozatgyartas meg az iden. Lehet hogy pont az ATI lesz az. Ettol meg az a helyzet nem valtozik, hogy akarmilyen felvezeto szakmai konferencian azt hallom a gyartoktol, akik uzemeket tartanak fenn, hogy iszony gaz a low-k.

Az elso szeriak meg arra valok, hogy hibat javits benne, aztan rajossz, hogy a hibat nem a tervek okozzak, hanem a gyartastechnologia + a design egyutt es adott esetben nem tudod korultervezni a gyartast. Erre is van par tucat pelda.
Pl. mit csinalsz, ha kiderul mikro-osszcillatorokat sikerult produkalnod az adott gyartassal, ami egy adott freki utan 1-2%-os yieldet ad csak? Kiderul, hogy ez a low-k miatt van, mert valamit NAGYON mashogy kellett volna tervezned. De ehhez az egesz lapot at kell tervezni, az nem megy par nap alatt. Sot par honap alatt sem...

Aztan meg a millios mennyiseg nem mervado, 5-10 wafer eleg, boven eleg. Csak egy kerdes, valaki tudja, mennyibe kerul egy 0.13u-os maszk, ha valtoztatnod kell es uj szetet kell csinalni? Es mennyibe fog kerulni egy 90nm-es maszk?

Tesztelni nagyon sokan tesztelik vagy 5-6 eve. Eppen ezert nem azt mondom, hogy nem lesz low-k, csak meg kell neki egy kis ido, mire valoban minden gondot megoldanak.

Az GPU-k eseteben egyetlen dolog segit, nagyon regularis az aramkor, szepen replikalhato, bar meg kell mondanom, miota programozhato pixel es vertex shaderek vannak, mar ez sem igaz. Szoval tudja valaki, hogy mekkora a pipeline egy GPU-ban ma? Meglepoen hosszu... A hosszu pipeline-ok meg bonyolultak. Ami kozos minden prociban, hogy ma mar a nagyjat a memoria adja, az meg 50-80%. Persze korrektebb lenne azt mondani, hogy a cache-ek adjak a lapka 50-75%-at. A mai 100-400M tranyos csipekben 10-40M tranyo a core, de abbol is lejon a 64-128k L1 cache...
Elric

[Ytse]

idézet:

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Ezt írta Elric:
Aztan meg a millios mennyiseg nem mervado, 5-10 wafer eleg, boven eleg. Csak egy kerdes, valaki tudja, mennyibe kerul egy 0.13u-os maszk, ha valtoztatnod kell es uj szetet kell csinalni? Es mennyibe fog kerulni egy 90nm-es maszk?[/quote]

Tanító bácsi én tudom, millió dolláros nagyságrend.

[T2k]

idézet:

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Ezt írta Ytse:


Tanító bácsi én tudom, millió dolláros nagyságrend. [/quote]

Az nem nagy szam: mar a 130 nanos mask set is olyasmi volt, mig a 150 nanosok siman kijottek parszor tizezerbol.
Anno errol irtam is vhol, vmelyik regi R300-as topicomban... :confused:

[T2k]

Balra alu, jobbra rez.


Amugy az elso ilyen tomegtermekrol, az ATIs RV360-rol (aka Radeon 9600XT):

The initial RV350 chip, the first of ATI's to be based on the 130nm silicon process, used TSMC's 130nm LV (high performance) process that utilises copper interconnects. Copper has a lower resistance than the aluminium interconnects used by the 150nm process, which results in a higher operating frequency with a lower power consumption, as well as the wires being more densely packed as they are thinner. The LV process also uses Fluorinated-doped Silicate Glass (FSG) insulating material which has a lower capacitance than the insulators used in previous processes which allows for faster transistor switching and hence higher clock speeds.

With the change from RV350 to RV360 an enhanced version of the 130nm LV process became available with a new "Black Diamond" insulating material with a lower capacitance than FSG and hence a lower diametric constant (k). This gives rise to the term low-k 130nm process and this facilitates even faster transistor switching, thus greater speeds.

When RV350 was initially taped out in January '03 it had a target clock speed of 350MHZ, however as the 130nm process matured, by the time it reached final silicon in May the yield enabled ATI to ship it at 400MHz. With the low-k process RV360 is able to move up by an extra 100MHz to 500MHz, and with OVERDRIVE enabled further speed will be available to all users of the ATI Radeon 9600 XT.

Itt: [url="http://"http://www.beyond3d.com/reviews/ati/rv360/index.php?p=1#process"]http://www.beyond3d....php?p=1#process[/url]

[T2k]

UP
Cikk

December 03, 2003 08:01 AM US Eastern Timezone

Chipworks First Inside Low-K Dielectric Technology, Confirming Leadership Position in Field of Reverse Engineering Services


SEMICON Japan 2003
Booth #: 5-B402

TOKYO--(BUSINESS WIRE)--Dec. 3, 2003--Chipworks Inc. ("Chipworks"), the standard setting supplier of reverse engineering services, confirms that samples they have examined of ATI's RADEON 9600 XT visual processor, fabricated by TSMC is using a true low-k dielectric process. Chipworks confirms that the low-k in this part is Applied Materials (AMAT) 'Black Diamond' material.

In September 2003, ATI announced the RADEON 9600XT. Billed as the world's first visual processor developed using a low-k dielectric process, it features four pixel pipes and 128MB of graphics memory and claims to delivers unrivalled performance. Leading edge performance requires leading edge process technology, and for the past few years integration of true low-k dielectrics has been a major goal in boosting interconnect performance on an integrated circuit (IC). Initially forecast but not seen at the 180 nm node, low-k was expected to be part of the 130 nm ramp-up. However, because of process integration and reliability problems, most 130 nm processes went into production using fluorinated glass (FSG). TSMC has offered their 130 nm process with both FSG and low-k options, but began ramping the low-k just this quarter (Q4, 2003).

According to Dick James, Chipworks' senior technology analyst, "Chipworks has been trying to obtain true low-k parts for over a year, but each time we analyzed a leading edge chip, we found FSG in there. This is the first chip that Chipworks has seen with significant structural changes that indicate the use of a 'true low-k' dielectric. By 'true low-k', we mean a layer with a dielectric constant of 3.0 or lower."

Preliminary analysis shows that the part is manufactured in a 130nm process, with eight levels of copper. The low-k material is used to isolate the lower six levels, and FSG for the top two metal layers. Also, the dual damascene structure is different from the FSG process. There is no etch-stop layer and the vias have a multi-stepped structure. Chipworks is continuing the analysis to fully characterize the leading edge processing of this device.

There will be challenges in the analysis because low-k structures are inherently more fragile. A major reason for the delay in introduction of true low-k into the market has been the difficulty in packaging these devices due to this increased fragility. We have already seen some delamination in the cross sections we have produced so far." confirmed James.

"Chipworks is always looking for the latest and greatest semiconductor technology, either through our international network of suppliers or by purchasing strategic downstream consumer products. Being the first identified true low k device, the ATI RADEON 9600 XT project will provide engineers the opportunity to look inside this latest technology node." stated Chipworks president, Julia Elvidge.

TSMC's 130 nm process, the first production line process with successfully integrated low-k dielectrics, will be presented in greater detail in an upcoming structural analysis report. Chipworks structural analysis reports deliver an objective analysis of 'what's inside technology' of leading-edge semiconductor devices.

About Chipworks

Chipworks is an internationally recognized technical services company that analyzes the circuitry and physical composition of semiconductor chips and electronics systems for applications in patent licensing support and competitive study. Chipworks' technical experts use sophisticated lab facilities and a rich library of in-house semiconductor data and expertise to conduct detailed analyses of a wide selection of chip types. Chipworks develops high value, meticulously researched, on-time reports presented in a format that is easy to understand and tailored to customer needs.

Since 1992, Chipworks has successfully helped semiconductor and electronics organizations achieve their goals by supporting research and development efforts and patent portfolio management. Headquartered in Ottawa, Canada, the Company has offices worldwide. Chipworks can be visited via the Internet at [url="http://"http://www.chipworks.com[/i"]]www.chipworks.com[/url]

[ 2003. december 05.: T2k szerkesztette a hozzászólást ]

[T2k]

Erdekes reszletek, hogyan is alakult anno az R3xx-csalad termelese-gyartasa tavaly-tavalyelott: [url="http://"http://www.ati-news.de/HTML/Berichte/Asus/R9800-XT/Asus-Radeon-9800-XT-Seite1.shtml"]http://www.ati-news....XT-Seite1.shtml[/url]

Babelfish-angolul :

The way from the Tape Out to the R360 That original R300 was manufactured briefly in 0.15 the Micron LV process by Taiwan Semiconductor Manufacturing CO TSMC. The 0,15 Micron LV process represents the best compromise from achievement (high performance) and energy dissipation. In later tests it turned out that by increase the core tension in connection with an acceptable yield (yields) could be further increased the chip clock. By an easily improved manufacturing process, when Micron LVOD designates 0,15, one could raise the chip clock around further 38 MHz to the Tape Out with 287 MHz.

Short time began ATI later with the development of the R350. After the Valetierung of all possible production technologies, including new 0,13 the Micron process, ATI decided to it, the R350 in improved 0,15 a Micron LVOD procedure manufactures to leave. The designers attached particular importance with the R350 to the isolation (to decrease of leakage currents) and on shortened signal running times in the chip. In interaction with that ATI the chip clock could raise 0,15 Micron HS process around further 55 MHz to 380 MHz.

After 6 months the 0,15 Micron process develops very well and makes for ATI possible a very good yield of the Waver. That offered the opportunity to ATI to increase the clock further. But one had particularly to fight with problems between the core I/O Pads and the core Logic. Both parts of the chip work with a different clock and use besides still different transistors with somewhat different periods of reply. Engineers of ATI could repair the problem by the implementation of the Delay in such a way specified LOCK loop Struckturen between the two chip parts in the R360.

In the interaction of 0.15 Micron with Delay LOCK loop could increase ATI the clock clearly to the Radeon 9800 pro. All ATI Radeon chip goes through numerous tests, in order to guarantee the full reliability, before ATI releases the chips for production. In order to ensure also under extreme conditions the enterprise of the Radeon 9800 XT, ATI decided for a conservative default clock of 412 MHz, in order to avoid an overheating of the diagram chip.